1. Field of the Invention
The present invention relates to a semiconductor circuit for executing a logic operation by a quite novel mechanism, or more particularly to a quantum wave circuit suitably used with an ultra-high density logic operation circuit operating at a very high speed with a low power consumption utilizing the quantum wave interference effect of the carriers including electrons and holes.
2. Description of the Related Art
Since the invention of a semiconductor integrated circuit initiated by the planer technique of J. Kilby of Texas Instruments and R. Noyce, et al. of Fairchild in 1959, the progress of the Si or GaAs LSI (Large Scale Integration) technique has been very conspicuous. (See, for example, 1. Ultrahigh speed bipolar device, 2. Ultrahigh speed MOS device, and 3. Ultrahigh speed chemical compound semiconductor device, in Ultrahigh Speed Digital Device Series, edited by Takuo Sugano and published by Baifukan 1985-1988.)
The architecture involved has consistently been unit devices (such as a bipolar transistor, MOSFET, resistor and capacitor), formed on the same substrate, isolated and wired thereby to constitute a system (large scale integrated circuit; LSI) on Si or GaAs. This conventional architecture has been intended to improve the device performance by reducing the size of devices and thus the performance as an LSI. Note however, in the case of an Si MOS memory of 64 megabit DRAM, while the memory cell size has been reduced to as small as 1 .mu.m.sup.2, further integration is considered not industrially advantageous mainly due to the difficulty in wiring (as the unit price per bit and the operating speed fail to improve). In other words, the very technical concept of improving the integration degree by reducing the device size is losing its effectiveness. The high integration by an Si bipolar ECL (Emitter Coupled Logic) circuit, on the other hand, is seriously hampered by the problem of heat generation, let alone reduction in size.
Specifically, the conventional architecture of highly integrated semiconductor devices is being technically saturated or facing a limit with respect to
1) High integration PA1 2) Operating speed of LSI, and PA1 3) Power consumption.
S. Datta, et al. have recently suggested in Appl. Phys. Lett. 48 (1986) 487 a field effect transistor QUIT (Quantum Interference Transistor) for controlling the source-drain current by utilizing the interference effect derived from the "route difference" of electrons. This suggestion is aimed only at high performance of a unit device (a FET of very low power consumption) and relates to a semiconductor device included in the category of the conventional architecture referred to above.
In the prior art, Mark A. Lead and Robert T. Bate have used electrons trapped in a quantum box called the quantum dots as a memory or developed a quantum well logic connecting quantum boxes by the tunneling effect (JP-A-61-82470, JP-A-61-82471, JP-A-61-82472, JP-A-61-82473). Although control terminal is required in order to form a potential gradient or the like in the electron tunnel between quantum boxes and the mere arrangement of quantum boxes still lacks the function as a circuit or a system, these devices are practically distinguishable from the conventional architecture of a semiconductor integrated circuit.